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Altera_Forum
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9 years ago

MAX10 primitive TRI-state output buffer ERROR

All, I am converting a MAX-II design over to a MAX10. I get the error 12168 I/O primitive ALT_OUTBUF_TRI is not supported for the selected family (MAX 10). What/where can I find informat...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

The 'Altera GPIO Lite' IP is available in Quartus from the IP Catalog. With your project open in Quartus, make sure you can see the IP Catalog (press ALT+7 to hide/show it). Type 'GPIO' in the search box to find it and double click it. You can then configure the IP (as the 'bidir' buffer you need) and instantiate it in your design. Use the rtl (Verilog or VHDL) or you can use the .bsf symbol file if you capturing with schematics.

Cheers,

Alex