Max10 PCB Layout - Unused Pins

Hello,

I am building my first from-scratch FPGA project. I’m using a Max10 10M02SC 153-MBGA, but my design is really simple. I really only need to use one bank because I only need about 16 I/Os. (I started with a smaller Max10, but I wanted the single-supply option to keep my PCB simpler.) I’m running everything at 3.3V, and I’m not using the ADC or anything else fancy. I don’t even have an external clock- I’m using the Max10’s built-in clock. I’ve tested the design on an evaluation board, and it does work.

So, I am now going to have around 100 unused pins. I have read many places that I can set them to “inputs tri-stated with weak pull up” and then I don’t need to even connect them to the PCB. Is that correct?

My big reason for asking is this: because my design is so simple, and low-speed (external clock speeds are about 14kHz), I would like to eliminate some of the MBGA pads to allow easier trace routing to other pads. This way I can keep the PCB to 2 layers and hopefully not need expensive laser-drilled microvias. Does this sound reasonable?

I do intend to connect all of the VCCIO, VCC_ONE, VCCA, and GND pins, so there will still be a lot of mechanical stability.

Thanks!