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Altera_Forum
Honored Contributor
Honored ContributorMAX10: internal Pull-UP, enabing state
Hi, using MAX10 FPGA, is there a way to change the internal Pull-UP status (Enabled-Disabled) in user-mode? at the moment it is possible to do it only inside Quartus before generating the...
Altera_ForumHonored Contributor
Honored ContributorInternal pull-up is set in configuration bit stream and can't be changed from FPGA fabric, similar to IO standard selection and drive strength.
