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Altera_Forum's avatar
Altera_Forum
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8 years ago

MAX10 Bank voltages

Hi All, I am debugging PCBs containing a design using the MAX10x50SCE144. All the banks except 5 & 6 run at 3.3V and banks 5 & 6 run at 2.5V for receiving SUB-LVDS signals. Accordingly I have...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

There is no scope inside the FPGA for it to 'short' these supplies together. Or indeed pull banks 5 & 6 to 3.3V via the other bank supplies.

You either have a design fault or a build fault. The fact you've changed the FPGA and changed the symptom suggests you had a build fault - I'd be guessing as to what that was without more detail.

However, given the 2.5V rail is still showing 3.3V I suggest you still have a design fault or a further build fault.

Did you, by chance, power the board when the FPGA was removed? Is your 2.5V supply giving out 2.5V - or 3.3V?

The schematic you've posted isn't readable (a common problem with images posted here). Perhaps try and post it again.

Cheers,

Alex