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Altera_Forum
Honored Contributor
Honored Contributormax operational Frequency
Hello folks, I use Quartus II 8.1 and DE2 board. When I compile my design I don't have errors in report, only warnings. But, looking at the report window I can see that my design don't meet t...
Altera_ForumHonored Contributor
Honored ContributorYes batfink, you helped me, thanks.
But I want to clarify the following: What does that means that my design don't meet timing requirements? Is there any compilation parameters regarding the clock settings that is set by default and they are the main reason why my design don't meet timing requirements ? Looking at timing report I can see three various times: Worst-case tsu, th and tco? What is the meaning of these timing parameters? :confused:
