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Altera_Forum's avatar
Altera_Forum
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18 years ago

Max II Pin Assignments

Hello,

I am going to use an EPM240 device in our product. I developed a designthat uses 72 pins and 214 Logic Elements.

I have a few questions:

1. Can you please direct me to a guideline how to assign the CPLD pins? Please note that the CPLD will drive 16 LEDs (sink mode).

2. There are a few devices in the EPM240 family. What would be the less expensive device and what would be the less complicated device from the PCB board design point of view?

3. I would like to place a JTAG connector and connect it to the CPLD for In-System CPLD Programming. What considerations should I take when assigning the CPLD pins and what PCB circuit design consideration should I take in order to implement the JTAG interface?

Thank you,

Eitan Barazani

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    18 years ago

    1. You need to determine how much current you are going to be sinking. In your previous thread, someone linked you to AN293. That app note shows that MAX II can sink up to 130 mA between GNDIO pads.

    You must look at the EPM240 full I/O pin list to understand where the GNDIO pads are. They are listed in the Pin/Pad function column of the full pin-out. AN 293 indicates that you can only sink 130 mA total for the set of I/O pins located between any two GNDIO pads in the list.

    If you know you are sinking 25 mA per pin, then you can only have 25 mA x 5 pins = 125 mA for driving LEDs between any two GNDIO pads to meet the 130 mA maximum limit. So you must make sure you distribute these around between different GNDIO sets if you have 16 pins at 25 mA. If you have only 5 mA, then you don't need to worry about any restriction since 5 ma x 16 = 90 mA total.

    2. Check the online store at www.buyaltera.com (http://www.buyaltera.com). Click MAX II, then do a search for EPM240 so you can see the different flavors and costs. Slowest speed grade is cheapest (-3, -4, -5 means -5 is the slowest). EPM240G is a 1.8V device while EPM240 (non-G) is a 3.3V or 2.5V device, same price for EPM240 size. Smaller packages are are cheaper - the EPM240 only comes in 100 pin packages so the prices are generally the same for given speed grade across the packages. T100 (TQFP) is the easiest to use for assembly and board layout.

    3. JTAG pins are fixed on the device, you need to check pinout for their location or check the .pin file that results from Quartus. It shows how to connect pins.

    For pull-ups and other JTAG considerations look at pages 5-8 on this guideline document. It also talks about the current sink.

    http://www.altera.com/literature/an/an428.pdf