MAX-II and simple XNOR gates

All,

Setup:

Quartus 9.0 (schematic entry)

MAX-II EPM1270

I have been debugging my main schematic that seems to be working OK except for one little part... my Address_Match part.

so I created and programmed "JUST" the Address_Match section

(4 2-input XNOR gates that all tie to a 4-input NAND gate) so when ADDR = CHIP_ID the output goes LO.

This SIMS fine and I get the results as expected.. but... when programmed into the PLD this simple circuit only produces a LO when all inputs are open (I do use weak-pullups). If I ground all the inputs, which would mean address 0000 and CHIP_ID = 0000 I still get a HI on the output. I get the same results on any address that matches CHIP_ID address.

Anybody have any ideas? What do I have set up wrong?

Keith

(attached is my simple circuit)