Max DMA transfer with PCIe Qsys Example

The read and write masters were configured to handle up to that I think. You can configure the maximum transfer length size in the masters but the larger the transfer size the lower the mSGDMA Fmax will be. It's a scatter-gather DMA so if you need something larger just send multiple descriptors to complete a large transfer as a collections of smaller transfers (that's the whole point of using a SGDMA over a regular DMA).

I'm guessing the 32B multiple requirement is because the "Full words only" feature is enabled which means that the data must be aligned to the word size and be full word accesses throughout the transfer. This is most likely an Fmax optimization as well since that is the fastest configuration of the mSGDMA master cores.