Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorMAX-10 Input clock information
Hi Folks, I am using MAX-10 FPGA (P/N: 10M02SCU169C8G) in my design. Application of the FPGA is to manage board controls and power sequencing. Here clock input information is limit...
Altera_ForumHonored Contributor
Honored ContributorThe clock frequency can be anything up to the maximum specified in the datasheet - in your case 402MHz (providing an appropriate clock network is used).
Drive the clock into any of the 'CLKxx' pins, listed in the 'Optional Function(s)' column, in the 10m02sc device pinout (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/dp/max-10/10m02sc.pdf). Cheers, Alex
