Master Thesis on Cyclone V with DDR3 - Image Processing

Question

Hi,

So far i have been working with Cyclone III devices. Never had to use any external memories.

Also I have bought Altera DE2 board and was doing some image processing with 1.3 Mpix camera module included with the board.

Now I'm preapring myself to do my master thesis. I would like to make a tracking system - video input and my board to control some two stepper motors or servomechanims

for pan/tilt tracking. I also have 7'' LCD to show the user real-time processed data and to provide some kind of interface and control.

I have also been doing some HW Design in Altium Designer and P-CAD - mainly 2-4 layer boards -and i know the concepts for more layers. I would like to use BGA package, so would have to go probably for

at least 6 layers.

I could go for CIII and simple SDRAM and use my 1.3Mpix camera module, however i wouldn't learn much from it.

So rather i would like to use some HD input video and DDR2/DDR3 memories with newer Cyclone devices - preferably Cyclone V.

I don't know any specifics, however i have heard that Cyclone IV are not that good.

I can leave with the price of the Cyclone itself and 6-8 layer board along with other peripherals and memories.

So finally: I have about a week or two to decide what hardware solution to use. I'm afraid that i don't have the time now to go through all Cyclone V documentation. Even if i would in that period of time i

could loose smth.

I would be very appreciated if I could use some experience of alteraforum users.

1. Will I be able to use memory modules with Quartus Web Edition as OpenCore. It doesn't really makes me any difference if I have to keep my JTAG plugged in. I would like to learn a new hardware/solution

and maybe in future buy all necessary licenses.

2. Will I be able to develop a code for embedded hardware Cortex-A9 with Web Edition ?

3. I have seen that for Cyclone V there are software and hardware memory controllers. Which one of that i would be able to use.

4. Could you suggest any DDR3 IC chip that is well supported ? I also suppose that i could use T-Branch topology even for DDR3. I have read that there are some issues with Fly-by with Cyclone V.

5. What video input would you suggest ?

6. Do you have any other ideas, suggestions or issues that my arise ?

Thanks for any help,

Kind regards,

madness

altera_forum · Answer

Rather than spin your own board for your project, why not just use a devkit with some add on expansion boards?

This one has two HSMC expansion ports so you can have two daughterboards:

http://www.altera.com/products/devkits/altera/kit-cyclone-v-gt.html

Here's a motor control HSMC daughter board:

http://www.altera.com/products/devkits/altera/kit-multi-axis-motor-control.html?gsa_pos=4&wt.oss_r=1&wt.oss=motor

Or if you can't find an HSMC daughter board that will do exactly what you need, why don't you go ahead and spin your own

HSMC daughter board

and leverage one of the pre-existing FPGA development kits for interfacing with it.

altera_forum · Answer

Hi Gwall,

thanks for your reply.

I really love HW design, and i would like to learn a lot in that matter. That kind of board would give me a great opportunity.

I have done some research on Cyclone V developement kits and found out that:

On http://www.altera.com/products/devkits/altera/kit-cyclone-v-gx.html

There are for DDR3 32-bit data bus two x16 devices

and one x8 device for ECC support.

Mainly on CV boards Altera uses:

MT41J128M8JP-125:G

MT41J128M16JT-125:D

They are not available on Digikey, however there are:

MT41J128M8JP-15E

MT41J128M16HA-15E

Which are only slower (667MHz compared to 800Mhz).

So i assume that it doesn't make a difference and i could use those ICs.

My questions:

1. Would i be able to use reliably only two x16 ICs without x8 for ECC ?

2. I assume that for HMC there are dedicated pins. It's more efficent to use HMC and SMC, so why use

on http://www.altera.com/products/devkits/altera/kit-cyclone-v-e.html SMC instead of HMC?

I don't know any specifics and wasn't looking for them, however i suppose that SMC utilizes much, much more FPGA resources.

3. What about DDR3 lenght matching. What do you think about the picture on that blog:

http://www.fedevel.com/welldoneblog/2012/05/so-dimm-ddr3-length-matching-diagram/ ?

It could be used also for ICs ?

4. Should I use T-Branch topology for DDR3 with Cyclone V?

5. What about embedded ARM cores as i see know. I thought that there was only one, but it seems that it's dual core.

http://www.altera.com/devices/processor/arm/cortex-a9/software/proc-soc-embedded-design-suite.html

Can i use standard JTAG for Cortex-A9 and be able to do all my developement? What about Linux Application Development ?

6. What would be the easiest and cheapest connection of some SDI interface, SD-SDI.

I also found http://www.microtronix.com/hsmc-daughtercard-solutions/hdmi-receiver-transmitter-hsmc-daughtercard-1

but for this kind of solution i can see that "The AD9889 requires the use of an I2C IP Core for device configuration."

So i wouldn't be able to copy hardware and use it quickly and easily.

Thanks,

madness

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Master Thesis on Cyclone V with DDR3 - Image Processing

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