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Honored Contributor
Honored ContributorLVDS input Clock Pin
Hi, I'm using an ADC AFE5808 from TI with LVDS output. I use a Cyclone IV EP4CE75F23I8L and the mega function Altlvds_rx. I configure the rx_inclock pin ADC_CLK_D_P as LVDS pin with his ...
Altera_ForumHonored Contributor
Honored ContributorAt 65 MHz input clock the ADC generates a 445 MHz output clock with only 240 ps setup and hold time on it DDR data output signals.
