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Altera_Forum
Honored Contributor
13 years agoLVDS input Clock Pin
Hi, I'm using an ADC AFE5808 from TI with LVDS output. I use a Cyclone IV EP4CE75F23I8L and the mega function Altlvds_rx. I configure the rx_inclock pin ADC_CLK_D_P as LVDS pin with his ...
Altera_Forum
Honored Contributor
13 years agoDo you have a location assignment on that input port? The altlvds instantiates a PLL, and there are dedicated clock portsthat must be used to drive the PLLs, i.e. it can't be any LVDS input location. If you do have it assigned, just disable that assignment and see if it fits, i.e. if Quartus can find a valid location. If so, then you need to find one that matches your board layout.