lpm_divider latency

Hi,

I am new in VHDL and Altera FPGA.

I am currently working with a Cyclone III.

I want to use the megafunction lpm_divide to do a signed 32 bit / signed 16 bit division.

I read in the Altera documentation that the lpm_divide megafunction can be used without any clock-input.

My question is: How do I get the time delay caused by the lpm_divide megafunction? In other words: How do I get the time a division 32bit/16bit will take? Do I have to use the Time Quest Analyzer?

Thank you very much.

Chris