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Altera_Forum
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17 years ago

Low Pass IIR filter using cyclone II FPGA

Hi everyone, I hava a task to implement low pass iir filter on cyclone II FPGA. The parameters of filter are the following: fp=5kHz; pass band frequency fs=8kHz; stop band frequency Fs=44k...
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Altera_Forum
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17 years ago

The transition from 2s complement to unsigned is performed by inverting the MSB (this is the same as adding half dinamic range), and everything works if the original 2s complement signal is not overflowing or underflowing.

So before your multiplication you have to perform the conversion and your multiplication will work in unsigned mode.