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Altera_Forum
Honored Contributor
Honored ContributorLooking SPI master/slave in verilog sample
Hi there, Does anybody has a very simple sample of SPI protocol in simulation about master/slave in verilog? Looking for sample how to connect SPI master to SPI slave and verify in modelsim. ...
Altera_ForumHonored Contributor
Honored ContributorPlease try to understand the example at
www.fpga4fun.com/spi2.html (http://www.fpga4fun.com/spi2.html) Are you experienced in ModelSim ?
