Forum Discussion
Altera_Forum
Honored Contributor
15 years agoLast bits of config. bitstream are ignored in Passive Serial Configuration
Hello, i am trying to configure Cyclone III (EP3C25E144C8) fpga via Passive Serial configuration method. I send all bitstream data to the fpga, but as you see on the image below, last 9 (or 10) bi...
Altera_Forum
Honored Contributor
15 years agoThose are simply padding bits being transmitted by the host until it receives the CONFIG_DONE signal, or until detects an error condition.
If you take a look to data line, you see a sequence of 0xFF bytes. This is usually done because some devices need extra clocks for startup timing. The 'substantial' bitstream required for fpga configuration has actually finished a few bytes before you see CONFIG_DONE going high.