Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Last bits of config. bitstream are ignored in Passive Serial Configuration

Hello, i am trying to configure Cyclone III (EP3C25E144C8) fpga via Passive Serial configuration method. I send all bitstream data to the fpga, but as you see on the image below, last 9 (or 10) bi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thanks..

I remembered that CRC check feature was OFF. I thought that maybe these bits are CheckSum and they are ignored because this feature is OFF. So i switched it ON, then configured the bitstream again.

But result is the same. As zoomed on the new screen shot below.

I think that if these bits are CRC bits, then fpga would first check these bits and then decide if there is a CRC error or not. And release the config done pin according to the result.

Any other ideas?

http://c1109.hizliresim.com/11/9/7/10429.jpg