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Altera_Forum
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14 years ago

Last bits of config. bitstream are ignored in Passive Serial Configuration

Hello, i am trying to configure Cyclone III (EP3C25E144C8) fpga via Passive Serial configuration method. I send all bitstream data to the fpga, but as you see on the image below, last 9 (or 10) bi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

This is a small, test application. It can work. But I am planning to use nearly all logic cells with full performance. So i wonder if those last bits effect the bitstream or not..