JTAG and/or IO pin usage

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The basic question is: is it possible to program a EPM3064 through the JTAG pins, then use the JTAG pins as IO, then later reprogram it?

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Look at the pinout for the device;

http://www.altera.com/literature/dp/max3k/epm3064a.pdf

The JTAG pins are dedicated pins that cannot be used as I/O afterwards.

If you want to reuse the JTAG header on the board to access I/O pins on the FPGA, then that is definitely possible; see page 8 of the attached schematic for an example. In this scheme, a 2-pin header is either attached or removed to route the signals to JTAG pins or to I/O pins.

Back when you could interface to JTAG using the parallel port, I used to use an unused pin on the ByteBlaster cable to select the operating mode (via the HDR_JTAG_SEL signal), however, the newer USB-Blaster cables cannot easily be re-tasked as a general purpose digital I/O interface (though I'll figure it out one of these days ...). Make sure the resistor on the HDR_JTAG_SEL signal is a no-mount, as it seems to confuse the USB-Blaster.

Cheers,

Dave