Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

JTAG Access for ID Read

Hello All , I have designed a JTAG controller using FPGA I could verify my write sequence by monitoring TMS and TDO on the scope , All the signal looks fine on the scope And I hope to...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Hello CW ,

Thanks very much for your answer

I will try to search for it

Thanks

Cheuk