Forum Discussion
Altera_Forum
Honored Contributor
8 years agoIs there a standard way for an FPGA Qsys system (Nios II) to access HPS pins?
Is there a standard method to connect FPGA side Qsys system Nios II to HPS pins and disable the HPS access to them? This needs to be done for UART, GPIO and Pushbuttons for Cyclone V SoC on the DE10-...
VROGE2
Occasional Contributor
6 years agoI am new to the DE10-nano and I am trying to use the UART TX pin as an output. I came across this thread as I was searching for a way to do this. What is meant by Boot the processor? and how does one configure the pins for LoanIO?
Thanks