Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Is there a standard way for an FPGA Qsys system (Nios II) to access HPS pins?

Is there a standard method to connect FPGA side Qsys system Nios II to HPS pins and disable the HPS access to them? This needs to be done for UART, GPIO and Pushbuttons for Cyclone V SoC on the DE10-...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Yes. Boot the processor.

You can configure in Qsys the pins for LoanIO. If you want to use the pins as inputs you don't need the processor running as the pins default to input. However to use them as outputs (e.g. UART TX) you will need the processor up and running as it has to configure internal mux registers to allow the LoanIO interface to control the pins.