Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

interface with niosII processor

Hi, Is it possible the interface of ram IP core (from megawizard plug in manager) with niosII processor and VHDL as target HDL. I have generated NiosII processor with 4K of on chip ram.Fo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I don't get it... sometimes you are talking about connecting an external ram, and then you are talking about a megawizard ram block, that is by definition internal. I don't understand what you are trying to do.

I agree with fheineman. Drop the VHDL and instantiate the on-chip memory in SOPC builder, as we have already told you several times.