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Altera_Forum
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14 years ago

interface with niosII processor

Hi, Is it possible the interface of ram IP core (from megawizard plug in manager) with niosII processor and VHDL as target HDL. I have generated NiosII processor with 4K of on chip ram.Fo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi,

I added on chip memory and intialized with hex file.In hex file I have intialized some 250 values. I want to read these 250 values through niosII. I am attaching my main entity vhdl file . I kindly request you to check and correct it.

I am not getting where is the problem...pls help me..