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Altera_Forum's avatar
Altera_Forum
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14 years ago

interface with niosII processor

Hi, Is it possible the interface of ram IP core (from megawizard plug in manager) with niosII processor and VHDL as target HDL. I have generated NiosII processor with 4K of on chip ram.Fo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Do you want a memory bloc that can be both accessed from outside and from the Nios CPU? In that case you will need a dual port RAM, not a "RAM-1 port", have to write some HDL to connect one of the ports to an Avalon Slave interface, and use the whole as a new SOPC component.

If you just one a single port RAM connected to the Nios CPU then don't use the megawizard. Just add an on-chip memory component as fheineman explained.