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As per reference document downloaded from Altera’s site, can be interface 5V signal to 3.3V operated CPLD using pull up and series resistor connected to IO pin and between two IC, but as per calculation, value of these resistors are very low, approx 200 Ohm, if operating frequency of signal is 40MHz. And if 20-25 signals (16 bit Bidirectional bus and control signal) are connected as above mentioned way then current sinking from VCC is very high. So is it feasible to use this configuration in my application? or there is only way to use level shifter in between two ICs.
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This particular scheme relies on the protection diodes in the CPLD I/Os conducting. I would not recommend doing this. A 16-bit bidirectional bus can be easily implemented using a single bus switch. Control signals are unidirectional, so those from 5V can be buffered with a Tinylogic device, and driven to the CPLD. The signals from the CPLD can drive directly to the 5V micro without any buffers.
Cheers,
Dave
Honored Contributor
