Intel Stratix10 SX Development Kit (ES2 Part) : Reference Example design

Question

Hi, I'm looking for an example design for Intel Stratix10 SX Development kit part (ES2 device). In the below site

https://rocketboards.org/foswiki/Documentation/GSRD181ReleaseNotes

, I found out 2 example designs for S10 for Quartus 18.1. Unfortunately, "SGMII" design isn't proper and has some issues in the design when opened and the other design listed as "GSRD" isn't for ES2 part.

Can anyone provide the link to any S10 SOC reference design (HPS+FPGA) for Quartus 18.1 Prime Pro?

Best Regards,

Vinay Shenoy

eberlazare_i_intel · Answer

Hi,This Intel Stratix 10 SoC SGMII reference design the updated version:https://rocketboards.org/foswiki/Documentation/S10SGMIIRDV181UserManualIs this the reference design that you are looking for? Let me know if you need further assistance.

shenoy · Answer

Hi @EberL_Intel​ Thank you for your reply.I feel I had downloaded same SGMII reference design from this site earlier and during re-compilation, I had faced some errors.Could you please help me to find any other reference design for the board?Regards,Vinay Shenoy

eberlazare_i_intel · Answer

Hi Vinay,Can you let me know which reference design link is having issues?

Forum Discussion

Intel Stratix10 SX Development Kit (ES2 Part) : Reference Example design

3 Replies

Recent Discussions

MAX10 nCONFIG pin slew rate requirement

Agilex 7 R-Tile RBES FPGA – Board Fails to Power On and JTAG Not Detected

Agilex 7 R-Tile RBES FPGA – CXL Device Enumeration Failure with CXL IP Design Example

Agilex 7 R-Tile RES FPGA – CXL Device Enumeration Failure with CXL IP Design Example

MAX10 FPGA pof-file programming fails