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SnehalB's avatar
SnehalB
Icon for New Contributor rankNew Contributor
3 years ago
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intel Cyclone V e , FPGA not reconfiguring to new flashed Image in EPCQ flash

Hi, we are using intel cyclone v e device with EPCQ connected serial flash. we are using two IP core in our design 1st generic serial flash controller IP core for flashing EPCQ256 with .rpd image ...
  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    3 years ago

    Hi, for CRC error, i think it could be due to the incorrect bitstream / bitstream order when loading it into the QSPI flash. I would suggest to select the appropriate data format when generating RPD file. You can select little endian for it. Otherwise, you need to do bit reversal.


YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
3 years ago

Also in generic flash ip core write data if 32 bit so for example flash data is 0x01020304 (0x01 being addr 0x00 data and so on) we are doing byte reversal as 0x04030201 as ip core write lsb byte first on qspi so for address alignment byte reversal done. (this we have done for both liitle as well big endian)

No, you dont need to do that. Just write byte-by-byte into QSPI flash will do. Use little endian is recommended.