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Altera_Forum's avatar
Altera_Forum
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15 years ago

integer data type

hello everyone, I need help here.Below is my vhdl code: LIBRARY ieee; USE ieee.ALL; ENTITY haar IS PORT ( clock : IN bit; clk : IN bit; -- Inputs in1 : IN integer RANGE...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Each of your ports translates to 8 bits in Hardware terms.

I wonder what

output <= input;

means as these names are not declared or did you just say it for short...