Instantiating Arria ii half-dsp block

Just to be clear:

In general, there's no need to deal with the specifics of the DSP blocks.

Quartus will take multiply/multiply-add/barrel shifts operations of arbitrary widths from plain VHDL code and map them to DSP blocks, chaining as many of them as needed.

Just make sure your code is recognized by Quartus and describes behavior that can be implemented in the DSP templates.

If that doesn't work for you.. then the only way is to deal with somewhat undocumented FGPA specific primitives.

For that, you need to compile some code that makes use of DSP blocks and then look at the .vho/.vo files Quartus produces for gate level simulation to get an idea.

Note that even at that level, there isn't a 1:1 mapping between the primitives and the hardware description from the manual.

Also, take a look at the Advanced Synthesis Cookbook -- it's intended for old Stratix but it's a start.