Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Initialization of AD7194 using SPI and Cyclone 2

Hi All, I am new to verilog. I am trying to initialize ADC AD7194. For this I am using SPI protocol and I am trying to obtain the wave forms as shown in the attached image. In the image, ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

you can add some reversers ,but need to caculate the time...

personal idea, some protocol is hard to realize in HDL. Some ip for control AD or SDRAM is complex. that is why many people use NIOS. It`s a good interface.

abort dealy .... just now I remember the DSP-builder Z^-1 used by filter, the module is in the storge in simulink. just now my talk seems wrong.