Inferring a ROM

Hello,

wondering if the posted code would be understandable, I found some points that should be clarified:

1. To enable the real math in in preparation of the sine table, the math library must be imported. The example uses this libraries

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.math_real.all;

2. The generate statement uses a feature, that may be unknown, cause it's ignored by most VHDL manuals, although defined in VHDL standard and (as far as I know) supported by all VHDL tools. Optionally a generate statement can contain a declarative part. If so, an additional begin preceedes the statement part.

3. The table in the example uses STD_LOGIC_VECTOR type cause it has been a replacement for an alt_ram megafunction in the original design. It could also use any numerical type.

4. Another way to code an inferred ROM table is to define an init function that returns an array. In the function, a sequential for loop sets all table values. The table is then instantiated as CONSTANT in the declarative part of the architecture. This technique moves the table generation completely to the declarative part, showing clearly that no "runtime" arithmetic shall be generated from this code.

TYPE ROM IS ARRAY(0 TO 511) OF UNSIGNED(8 DOWNTO 0);
FUNCTION INIT_ROM RETURN ROM IS
VARIABLE romvar: ROM;
begin
   --for .. loop
   -- romvar() := 
   --end loop
  return romvar;
end;
CONSTANT rom1: ROM := INIT_ROM;

Regards,

Frank