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Altera_Forum
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13 years ago

In-System Programming with Cyclone III

Hello, I have a custom board that uses the Cyclone III (EP3C40 - 240 pin) FPGA. The board has two headers for connecting to the ByteBlaster II. One of the headers is used for JTAG configuration...
Altera_Forum's avatar
Altera_Forum
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13 years ago

The description of DCLK sounds symptomatic of a poorly terminated transmission line. Does the DCLK signal from the FPGA have a series termination or perhaps a 0-Ohm stuff resistor that you can change to a non-zero value?

Cheers,

Dave