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Altera_Forum
Honored Contributor
Honored ContributorImplementing 18-bit lvds serializer in CPLD
Hello, Maybe this is a beginners question. I do not yet have a lot of experience using CPLDs. They are a bit more limited than FPGAs. I was wondering if it is feasible to implement an 18-...
Altera_ForumHonored Contributor
Honored ContributorQuite a pity. It would have been a beautiful solution. So what about the low cost FPGAs? Is it possible there? The solution would have a higher component count, but it might still be interesting.
Or does Altera already have FLASH FPGAs? How complicated is it to implement such a deserializer for 25Mhz parallel out? Do they have affordable IP for this?
