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Altera_Forum's avatar
Altera_Forum
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14 years ago

i do'nt want to remove redundant logic...

i want to implement ring oscillator with NOT gates but when i synthesize it, the synthesis tool remove the redundant logic, but my requirement is to keep redundant logic.. so plz someone help me to s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

you r right ..... i m using it for delay...... thank u.... ok , i'll try xilinx forum.. thanks