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Altera_Forum
Honored Contributor
Honored Contributori do'nt want to remove redundant logic...
i want to implement ring oscillator with NOT gates but when i synthesize it, the synthesis tool remove the redundant logic, but my requirement is to keep redundant logic.. so plz someone help me to s...
Altera_ForumHonored Contributor
Honored ContributorThis is an Altera Forum. Try the Xilinx forum.
But seriously - if its redundant, it has no use at all, and does nothing. what is the purpose of the redundant logic if it does nothing? Did you connect it to an output pin?
