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Altera_Forum's avatar
Altera_Forum
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16 years ago

I can't understand this error message

Hello,

While compiling the design, i have been permanently stopped by this message:

"Error (10028): Can't resolve multiple constant drivers for net "etat_suivant.idle" at fsm.vhd(191)".

I sought the Quartus help related but i couldn't figure out where is the problem.Does anybody have any idea about this?

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Hi alaaayed,

    you should verify the signal assignments in different processes (and/or concurrent assignment statements) for the signal "etat_suivant.idle"

    You should only do assignments to etat_suivant.idle in one process
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    In fact i need to make assignments in two different processes.Is there a way to overcome this problem and keep two processes at the same time?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    --- Quote Start ---

    In fact i need to make assignments in two different processes.Is there a way to overcome this problem and keep two processes at the same time?

    --- Quote End ---

    You can overcome this need by defining an enabling signal in one process and than use this enabling signal in the other process where you can than decide which value the signal "etat_suivant.idle" should take depending on your enabling signal.

    Hope this helps...
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    --- Quote Start ---

    In fact i need to make assignments in two different processes.

    --- Quote End ---

    It's basically the same as connecting two logic gate outputs together. It would create a short. There are different options to change it to a legal design, e.g. using a multiplexer. But in any case, only one of two assignments can be in effect at a time. You have to decide, which one and implement a respective switching signal.