Forum Discussion

KLohr's avatar
KLohr
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

I am getting a hold violation using the on chip flash ip. What can I do to resolve this issue?

It's from avmm_data_read to an internal node in the ip: -0.060 motor_ctrl:loop1|ufm_stmac:ufm_stmac|data_read motor_ctrl:loop1|ufm_stmac:ufm_stmac|max10_ufm:max10_ufm|altera_onchip_flash:onchip_flas...
KLohr's avatar
KLohr
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

The output delays are just place holders. Actually all inputs are asynchronous and outputs don't have any real setup and hold requirements.