Forum Discussion
KLohr
Occasional Contributor
Occasional ContributorI am getting a hold violation using the on chip flash ip. What can I do to resolve this issue?
It's from avmm_data_read to an internal node in the ip: -0.060 motor_ctrl:loop1|ufm_stmac:ufm_stmac|data_read motor_ctrl:loop1|ufm_stmac:ufm_stmac|max10_ufm:max10_ufm|altera_onchip_flash:onchip_flas...
sstrell
Super Contributor
Super ContributorCan you post your .sdc and more of this report (a screenshot would be better)? Is the 0.478 the clock relationship/skew? How are you creating the clock and connecting it?
#iwork4intel
kadonNew Contributor
But this way, I can see what the delays are. And constrain them later.
https://downloadnox.onl/ https://vidmate.vet/ https://vlc.onl/
