How to write user logic to control SOPC DMA controller?

We tried to implement such a control logic.

When we connect the logic with DMA controller in Qsys, it is reported that "Error: System.dma_0.control_port_slave: Master vga_dmalogic_0.dma_ctl does not have a waitrequest signal. Slave must match master's read and write wait time (read:1 write:0)"

However there is no texture mentioned read and write wait time requests for dma controller in its datasheet.

Do you have ever meet this problem?

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Yes you can write the registers directly. You can get their address from the register map. First get the component base address in SOPC builder, and then add to it the register's number multiplied by 4.

As an example if the component address is 0x00001000, you can access register 0 at address 0x00001000, register 1 at address 0x00001004, register 2 at address 0x00001008 etc...

This is the address that you must use on the Avalon memory mapped master interface.

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