how to transfer .bdf design file into .v file?

Hi,

I have all the pins assignment configured in the form of verilog file(also my top level entity), however i have my current design file in .bdf (symbol design).

So how do i use my Verilog file as top entity and instantiate my .bdf file in Verilog form?

The reason why i want to do so, is to avoid re-configurating all the pins assignment in .bdf .

Thanks!:)

Michael