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Honored Contributor
Honored ContributorHow to synchronize a PLL with a clock signal
In my design I require there to be a 100 mhz clock signal and a 50 mhz clock signal. I have an 50 mhz clock source so I decided to use a PLL to convert it to a 100 mhz clock. The only issue I have is...
Altera_ForumHonored Contributor
Honored ContributorA PLL always produces a feedback clock that's phase aligned to the input clock (hence the name, phase locked loop).
The several compensation modes in the megafunction let you choose the feedback path. You need to read a bit about each one and see which fits your needs. http://www.altera.com/support/devices/pll_clock/glossary/pll-glossary.html#c
