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XQSHEN's avatar
XQSHEN
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

How to set timing constraint to uart

uart is used as interface of external device. And this device has it's owner clock. When doing timing constraint, should I set uart rxd and txd as false path? or setting timing constraint using virt...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Do you mean there is no direct relationship between the FPGA clock and external clock? Could you elaborate?


Thanks

Best regards,

KhaiY


  • XQSHEN's avatar
    XQSHEN
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Yes. They are two individual device using uart to communicate.

    FPGA ------uart---------external device(wifi module).

    • XQSHEN's avatar
      XQSHEN
      Icon for Occasional Contributor rankOccasional Contributor
      5 years ago

      1. FPGA has its own clock

      2. Wifi module has its own clock