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Altera_Forum
Honored Contributor
9 years agoHow to reset a ram?
Hi, in my vhdl design I got a ram signal R then I try to test it against A with "if A > R then..." but R starts with a 'X' value so the test is not working. What could I do to solve that problem? ...
Altera_Forum
Honored Contributor
9 years ago --- Quote Start --- I don't see how a proper design would break as such.You read from ram what you have written to it. If you read before write then your approach is wrong. If you pass ramoutput to accumulate then start after the x. --- Quote End --- It depends on your approach. If you put in code to detect and ignore 'X', the synthesisor can use that as a "dont care" state and may minimise your logic in a way you didnt intend. Its much safer to allow Xs to propogate as it makes errors easier to detect.