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Altera_Forum
Honored Contributor
9 years agoHow to reset a ram?
Hi, in my vhdl design I got a ram signal R then I try to test it against A with "if A > R then..." but R starts with a 'X' value so the test is not working. What could I do to solve that problem? ...
Altera_Forum
Honored Contributor
9 years ago --- Quote Start --- As I'm using M9K I know the signal is starting at 0 but Modelsim doesn't know and says it's X. Is there a way of making the simulation start with 0? --- Quote End --- if you are looking at your registers at ram output then initialise them, otherwise ignore the x until it is driven from write side