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Honored Contributor
Honored ContributorHow to get 45Mhz clock out?
Hi dears: I am using ArriaGX devices, and the board's clock is 100Mhz which is input to the FPGA. And the system need a 45MHz clock, could you have any method to generate this clock through FPG...
Altera_ForumHonored Contributor
Honored ContributorI haven't used DSP Builder, and probably will not for some time as we build industrial cameras over here. But I have used resource sharing before, but it was just stuffing a pipelined cordic.
Saving resources always comes at the expense of more work, unfortunately but then it shows off great when we get the job done with the limited resources anyhow ... Coming back to the original start of this: can you humour me and explain, in the upsampling case of a 100 MHz system / DAC clock and a 45 MHz sampling rate, where the 45 MHz sampling rate comes from?
