Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorHow to get 45Mhz clock out?
Hi dears: I am using ArriaGX devices, and the board's clock is 100Mhz which is input to the FPGA. And the system need a 45MHz clock, could you have any method to generate this clock through FPG...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- System clocks nowadays are so fast relative to sampling rate that time folding is very common and this makes designer life miserable with spaghetti logic. --- Quote End --- I do not understand what you mean by this: Either you make your life miserable creating spaghetti logic using rate control / time folding, or it is the others having a miserable life not using it? I wouldn't compare a system using flow control to spaghetti logic ... Yet again, you speak about two clocks, the system clock and the sampling rate. But you haven't explained to me where the sampling rate comes from.
