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Altera_Forum's avatar
Altera_Forum
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15 years ago

How to get 45Mhz clock out?

Hi dears: I am using ArriaGX devices, and the board's clock is 100Mhz which is input to the FPGA. And the system need a 45MHz clock, could you have any method to generate this clock through FPG...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I have used this method for various projects esp. when upsampling data by variable fractions towards the DAC rate. symbol rate may vary in systems and need be uplifted to DAC rate. on the same fixed system clock I generate an enable "backpressure" from upsampler module running at system clock to request data at its lower rates.