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Honored Contributor
Honored ContributorHow to get 45Mhz clock out?
Hi dears: I am using ArriaGX devices, and the board's clock is 100Mhz which is input to the FPGA. And the system need a 45MHz clock, could you have any method to generate this clock through FPG...
Altera_ForumHonored Contributor
Honored ContributorHi guys:
In fact, I know how to implement PLL using QII. My question is that the ArriaGX's PLL couldn't get a output of 45Mhz when the Pll's input is 100Mhz. Thanks Jerry
