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Altera_Forum
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18 years ago

How to enable the internal differential termination resistor?

Hello I want to use the internal differential termination resistors in the stratix ii FPGA(EP2S60F1020C5) for LVDS receiving. The stratix ii handbook tells that these resistors can be set in ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

With V7.x Quartus software, the pin planner tool is the most comfortable way to enter and review pin location assignments, I/O standards, current strength and termination settings. You have to enable a column stratix ii termination in context menu Customize Colums and can activate differential termination for LVDS pins.

Alternatively, you can enter a new assignment name termination - stratix ii/..., value Differential, enabled yes for a pin or a pin group in Assignment Editor.